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Using a Memory Protection Unit (MPU) with an RTOS
Jean Labrosse (Software Architect, Silicon Labs)
Location: Room 201
Date: Thursday, August 29
Time: 9:00 am - 9:45 am
Track: ESC - Embedded Software Design & Verification
Format: Technical Session
Vault Recording: TBD
A Memory Protection Unit (MPU) is available in most Cortex-M microcontrollers yet, are seldom used in RTOS-based applications. This class will describe what an MPU is and how it can help make embedded systems more robust by preventing tasks from accessing memory or peripheral devices that are managed by other tasks.
The class will start with a quick overview of how typical RTOSs work without an MPU. I'll then show how an MPU can improve the reliability of an application by putting bounds on memory and peripheral access.
The MPU found in most Cortex-M microcontrollers will be used as an example of how an MPU works. I'll show how to properly use the MPU with an RTOS. Topics that will be discussed are:
- Privilege modes
- Limiting RTOS APIs for user code
- Preventing code from executing out of RAM
- Sharing data
- Keeping RTOS objects in RTOS space
- Handling faults
- Creating MPU process tables
- And more
The class will end with a list of recommendations on the proper use of an MPU in an RTOS environment.